Chapter 4 Destination Specification + Figure 4.4

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Chapter 4 Destination Specification + Figure 4.4

p.konrad
Hi

the book says:

"The value computed by the comp part of the Cinstruction can be stored in several destinations, as specified by the instruction’s 3-bit dest part (see figure 4.4). The first and second d-bits code whether to store the computed value in the A register and in the D register, respectively. The third d-bit codes
whether to store the computed value in M (i.e., in Memory[A]).

My understanding of this is
1. bit -> A  
2. bit -> D
3. bit -> M

the table in 4.4 though (and the example in binary) says:
1. bit -> A
2. bit -> M
3. bit -> D

I might just be missunderstanding the written explanation... please let me know ;)
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Re: Chapter 4 Destination Specification + Figure 4.4

cadet1620
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Look at figure 4.4 again.

The second line shows d3 set for M.
The third line shows d2 set for D.
The fifth line shows d1 set for A.

The order of the letters in the dest mnemonic does not imply the bit order in the field.

--Mark
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