# Creating the HDL code for the OR gate and MUX gate

3 messages
Open this post in threaded view
|
Report Content as Inappropriate

## Creating the HDL code for the OR gate and MUX gate

 I have questions relating to the simplification of the OR gate and MUX gate. Below is a screen shot for both gates. Question: - Or gate: The simplification is from nand2tetris Wiki. How was the simplification done? All the other gate simplifications were done step by step, but not for this one (see image below). - Mux gate: How is ‘b+b = 1? This is underlined in red. (see image below)
Open this post in threaded view
|
Report Content as Inappropriate

## Re: Creating the HDL code for the OR gate and MUX gate

 When figuring out OR, I first thought, "how can I make an OR from a canonical representation that already includes OR itself?!" I looked at different basic boolean proofs, and then I stumbled across DeMorgan's law. Take a look at DeMorgan's Law, and see what you can apply to each side to isolate "A+B = .....". This would express that "OR is equivalent to...."