I have a compararison failure at line 53 in CPU.tst and I am surprising to see that the pc counter can stay to the same state PC(t) = PC(t-1) although the rules for the pc counter in CPU.hdl is normally :
if jump(t) the PC(t) = A(t-1)
else PC(t) = PC(t-1) + 1
So what behaviour pc counter has to respect ?
The failing instruction is "D;JNE". The D Register value is -1 so the jump should occur. Since the A Register—addre[ssM] column—is 1000, the PC should be loaded with 1000. Because the PC was already 1000, it appears as if it was unchanged.
I'm guessing that your miscompare is because the PC was incremented due to an error in your jump control logic.
For a jump not taken, look at the instruction at time 30. This is a "D;JGT" with D=0, so the PC increments.