To do that, you need a bit more complicated CPU. The first thing it reads should be an instruction (or part of instruction). Let's say the instruction is to load the contents of address 485 in the A register.
The CPU remembers the instruction in special internal registers and instructs the memory to fetch the content of address 485.
On the next cycle (or more, in a more realistic CPU) the data arrives on the bus. The CPU "sees" that it's still executed the load instruction, so it stores this data in the A register. The instruction is done, so it can request the next one, and also clearing up its internal state.
This means that it will spend a lot of time just waiting for instructions or data to arrive. To speed things up modern CPUs use pipelining. (I just realized I linked to your thread :))