Hi, I have recently started with the book. I am now at chapter 2 and everything seems to be very interesting. I have implemented the Xor gate and I understand it. Also, yesterday I managed to implement the half adder and it works. My problem is: I don't know how to implement the simple gates from the first chapter. For now I have decided to move on but I am afraid I may reach a wall and I would be forced to go back. In order for me to implement the full adder I feel I must know how the simple gates are implemented. Some one please give me some sort of advice. Thanks in advance.
This is my implementation of the half adder:
[Working HDL code removed by admin.]
I don't know what you meant when you asked me about the NAND properties?
Any advice or suggestion is greatly appreciated.
Having looked at this implementation, I can't see what your problem is, you easily know enough to make the simple chips from a Nand.
Only thing I might say is that maybe you are doing things the hard way.
You are not incorporating the Xor chip you made, as a pre-fabricated chip into your half adder.
Maybe you are not abstracting things enough.
For example, making the Not chip using Nand and then using your Not chip as a component (along with the supplied Nand) of other chips?
Also can I point out that it's discouraged to post HDL code on the forum
(about posting HDL code) I know and I am sorry and it won't happen again. It's just that I couldn't think of another way to actually show where I am stuck. Thank you for the advice, I will put it to practice the first chance I get tomorrow.
Thank you again.
One thing that sometimes helps is to look at the truth tables for the parts you have (only the Nand when you're implementing Not) and try to see patterns that look like the gate you want. This may be easier if you cover one input column with your finger, or cover the top half or bottom half of the entire table.
Another thing that can help you see what existing gates do is to make truth tables where one of the inputs is "signal." For example, for some mythical gate:
a | b | c | out |
F | sig | F | F |
F | sig | T | /sig | (this means Not sig)
T | sig | F | F |
T | sig | T | sig |
This gate's c input selects whether the signal on b gets through. The a input determines if the signal is inverted on the way through.
If you had one of these gates and you needed an And, set the signal always True and the output will be a And c.