Multiple Options for Not

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Multiple Options for Not

runningbio
This post was updated on .
Hello, I am a super duper newbie to computers in pretty much any form.  I am a PhD biologist teaching high school and a mom... but my student recommended this course for summer.
I just had a great time thinking and figuring what the heck I am doing for the first part of the first project. Forums and resources help along with some research online about basic logic gates. This is quite outside of my way of thinking and will surely challenge me at every step and take me a million hours!

I basically can not believe I got an implementation for my Not gate to work! I am pretty excited, but I can not get other implementations option that I think should also be fine to work.

Hardware Simulator is looking for an additional ) or ' in the line.

I will delete my implementation when you reply.
XXXXXXX

Any guidance on how to begin to understand this would be awesome.  I am pretty certain that these types of questions are going to continue to get in my way.  If you think they will unravel as I move on to the other gates that response is useful too.  I'm 5 hours in and pretty thrilled to at least have Not, and a plan for And.
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Re: Multiple Options for Not

runningbio
Oh my gosh. The implementation I thought was working is not working anymore and giving me a comparison at line 2 failure again.  Oh No!
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Re: Multiple Options for Not

ivant
Hello and welcome to the course :)

You should check out Mark's excellent Hardware Construction Survival Kit.

For your specific problem, the error may be on the previous line, as some of the implementations that you provided should work. If you want, you can email me your full solutions directly.

--
Ivan
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Re: Multiple Options for Not

runningbio
Thanks. I went back and played a bit more and still can’t the one that worked first to pass.
Here is the .hdl file.  I have read the Survival Kit, the Q&A posts, Ch 1 and reference appendix A.
Appreciate any help to move pass step 1 of project 1.  Project 7 feels quite a long way off…

// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Not.hdl

/**
 * Not gate:
 * out = not in
 */

CHIP Not {
    IN in;
    OUT out;

    PARTS:
    // Nand(a=in, b=1, out=out);

}


From: "ivant [via Nand2Tetris Questions and Answers Forum]" <[hidden email]>
Date: Friday, June 17, 2016 at 10:52 PM
To: Carla Guarraia <[hidden email]>
Subject: Re: Multiple Options for Not

Hello and welcome to the course :)

You should check out Mark's excellent Hardware Construction Survival Kit.

For your specific problem, the error may be on the previous line, as some of the implementations that you provided should work. If you want, you can email me your full solutions directly.

--
Ivan


If you reply to this email, your message will be added to the discussion below:
http://nand2tetris-questions-and-answers-forum.32033.n3.nabble.com/Multiple-Options-for-Not-tp4029953p4029955.html
To unsubscribe from Multiple Options for Not, click here.
NAML
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Re: Multiple Options for Not

ivant
Lines starting with two slashes // are comments. They are ignored by the hardware simulator. In your Not.hdl file you actually commented out the implementation, so it's not working. Remove the two slashes from the line after PARTS: and try again.
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Re: Multiple Options for Not

cadet1620
Administrator
In reply to this post by runningbio
<quote author="runningbio">
    PARTS:
    // Nand(a=in, b=1, out=out);

If you are still having trouble with this...

As Ivan pointed out, // marks comments.  If you remove the // then you will get an error:
    In HDL file D:\TECS\projects\01\x\Not.hdl, Line 16, A pin name is expected: load Not.hdl

This error is happening when the HardwareSimulator is loading your Not chip. When it sees the "1" in "b=1" it is expecting to see a pin/wire name, which all begin with a-z.

What you are looking for is "b=true". "true" and "false" are built in constants 1 and 0.

Another common problem, if your HDL looks good but the test outputs are always 0, is that you may have made copies of the skeleton files for the HDL into a subdirectory, say projects/01/myhdl, and made your edits there. If you then run the .tst file in the projects/01 directory, it will be loading the skeleton file instead of your edited HDL.

You can scroll through the HDL code in the simulator's HDL window and see if your changes are in fact there.

--Mark
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