
Hi,
I wrote the following HDL code for the Part section of the Not.hdl chip:
Nand(a=in, b=true, out=c);
However this seems to fail the test, and I don't see why.
If in=0, then a=0 and b=1. 0 AND 1 is 0, negating this makes 1, therefore c=1.
If in=1, then a=1 and b=1. 1 AND 1 is 1, negating this makes 0, therefore c=0.
Sorry if I have missed something extremely obvious...it is quite late here.
Thanks for any help.
