Really not understanding Mux4Way16 design

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Really not understanding Mux4Way16 design

saltycraig
Hi, loving the course so far, but I've found it really challenging and I'm falling behind despite putting many hours into it already and having been coding for years. I'm not one to give up, so I'm looking for some help in understanding the architecture of Mux4Way16. In my searching on here I've discovered that others have built it using just 3 Mux16s. I was blown away. How did people come to discover this? I know that we have been kind of building on previous chips, but I just couldn't find a way to build it with just Mux16 and end up with like 18 chips and it not working correctly despite spending many hours retrying different designs (a lot of And, Not, Xors, with some Mux16, mostly).

Could someone explain to me step by step how they thought through this process? I think that would help me immensely.
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Re: Really not understanding Mux4Way16 design

cadet1620
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   sel    |
[1]   [0] | out
----------+----
     .- - - - -.
 0   . 0  |  a .
 0   . 1  |  b .
     .- - - - -.
 1   . 0  |  c .
 1   . 1  |  d .
      - - - - -.
I first look for patterns.  In this case I see two 2-way multiplexors when the
sel[1] column is ignored.

I also see that sel[1] chooses between the two 2-way muxes.

--Mark

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