Thanks. Yes I read Appendix A, Ch1, and the useful hints. but your explanation has helped a great deal. The line For each connection in a part, the left side of the "=" is an I/O pin in the part you are using. The right side of the "=" is a pin or wire in the chip you are writing. should be added to future versions of this book!
Logically it was simple to find the answer. But HDL. I forgot that just like a real NOT gate the output must have a value. The output pin of the NOT gate must have a value. In my HDL I hadn't assigned the "out" variable (If I can call it that) a value. So i routed my NAND's output to be the value for my NOT's "out"put and it worked perfectly.