Subtle different behaviors between the CPU emulator and the proposed CPU design

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Subtle different behaviors between the CPU emulator and the proposed CPU design

Chalermsak
I've completed chapter 5 successfully and now I am reading chap 6. Now, to my surprise, I know that an instruction such as

                D=D+A;JEQ

is also acceptable to the assembler and the Hack CPU as well.  Then by chance (and also by my dark side ;) I happen to discover a subtle difference in effect between the CPU emulator and the proposed CPU design (fig 5.9 in the book). I invented a simple program to show this discrepancy as follows:

                @3
                D=A
                A=D-A;JEQ
                @3
                0;JMP

Executing this program with the CPU emulator renders the PC to have the successive values 0, 1, 2, 0, 1, 2, ... (an infinite loop) while executing this program by the computer.hdl on the Hardware Simulator (using the CPU design in fig 5.9) renders the PC to have the successive values 0, 1, 2, 3, 4, 3, 4, 3, 4, ... (a different infinite loop).

This bewildered me for many days until I finally knew why. The 3rd instruction will certainly jump but the CPU emulator uses the new value of A (which is 0) while the fig 5.9 CPU uses the old value of A (which is 3) as the output of A is wired directly to the input of PC chip.

Once undertanding this, I've tried successfully to adjust the design a little by adding some more logics upon the wire leading to the PC's input so as to make it behave exactly the same as the CPU emulator.

So I'd like to report this subtle discrepancy here. Although the programming situations that would yield this discrepancy should be extremely rare (so it may not be that important) but the discrepancy is always there nonetheless.
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Re: Subtle different behaviors between the CPU emulator and the proposed CPU design

WBahn
Administrator
Sorry for the late reply. I saw this the day you posted it but didn't have access to the N2T tools at the time. It then fell off my radar.

I've confirmed the bug that you are seeing and will report it to the authors. Hopefully they will fix it in the current version of the simulator and verify that it doesn't exist in the version for the new edition of the text (which is now available for pre-order on Amazon).

I'll pass along what, if anything, I hear.
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Re: Subtle different behaviors between the CPU emulator and the proposed CPU design

WBahn
Administrator
I heard back from the authors and they've also confirmed the bug and are very appreciative for you finding it and pointing it out.

The new software will be sure to be consistent with the specs -- namely the jump destination address will be the prior value stored in the A register.

It sounds like there are no plans to upgrade the old software, which is understandably a lower priority at this point. I imagine that a bug report will sit there and perhaps get fixed eventually.