I've had no problems (and enormous fun) with project 2 and most of project 3 (building the RAMs was truly fantastic), but I can't get my PC validated. Read every thread on this forum about the PC, and still, I can't figure it out. I won't give up, and try again tomorrow, but in any case, these are the problems:
I'm presuming that the PC has a circular construction, just like the bit; and the Register functions as a DFF: in other words, Register gets two out's and one of them is circled back to a Mux. Most efficiently a Mux4Way16, with each of the four states (nop, inc, load and reset) as input and a 2-bit selector. For this I need to translate the 3 control bits back to a 2-bit Mux selector. I thought it would only take 2 Ors, but I can not get the HDL syntax correct.
Then I tried a concatenation of 3 simple Mux16's (Inc, 3 Mux16, 2 Or and Register): in my head and on paper this works perfectly, but the Hardware Simulator now tell me...
"This chip has a circle in its parts connections: load PC.hdl"
Duh, that's what I presumed in the first place, and it worked perfectly for the Bit. What am I doing wrong, here?
I'd be happy to post my HDL, or continue in email...
Thanks for the offer, but after a night's sleep, I went back to the PC, and within 10 minutes, I solved my own problem.
First error, as it turn out, this is NOT circular:
But this is... -smile-:
Or(a=x, b=y, out=x);
Second error: the PC seems to have 4 control states: nop, inc, load and reset. At first glance, the Register needs to be load-enabled for load (simple input), then I realized it also must be load-enabled for inc and reset (double Or), and finally I realized that even the nop, keeping the existing contents, must have a load-enable. In other words, the register must always load.
Next time, I'll sleep on it, before asking... -smile-