Tips for learning how to create .hdl files from all ports

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Tips for learning how to create .hdl files from all ports

Tathiane
As I learn how to develop these .hdl files for all ports, I'm having trouble learning it, I'm glad you can help me.



/ * Xor (exclusivo ou) portão:
   Se a <> b out = 1 else out = 0. -benzóico.
CHIP Xor {
    IN a, b;
    Fora fora;
    PEÇAS:
    Não (in = a, out = nota);
    Não (in = b, out = notb);
    E (a = a, b = notb, out = w1);
    E (a = nota, b = b, saída = w2);
    Ou (a = w1, b = w2, saída = saída);
}
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Re: Tips for learning how to create .hdl files from all ports

cadet1620
Administrator
Looks like your HDL got translated to Portuguese.  HDL only works with English keywords and part names.

In project 01, the only Chip that you have to start with is Nand (it is built into the hardware simulator).

None of the other chips will work until you build them. Your Xor that needs Not, And, and Or chips will not work until you make and test those parts.

You need to follow the order that the Chips are listed in chapter 1:

Build and test Not using only Nand.
Next build and test And using Nand and Not
Next build and test Or using a combination of Nand, Not and And.

Then you have the parts available that you need to build and test the Xor.

--Mark

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Re: Tips for learning how to create .hdl files from all ports

Tathiane
The xor port is in English was just a translation error.

Could you tell me a website or something that explains better on this subject, I understood how xor port works, but I could not how to complete the other ports (chips).

  thanks
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Re: Tips for learning how to create .hdl files from all ports

cadet1620
Administrator
You might want to check out the Coursera course From Nand to Tetris, part one. It is free and includes video lectures.

As to building the parts, you just need to think about them logically.

To build the Not chip, look at the truth table for Nand and Not:
  a | b || out      in || out
 -------------      ---------
  0   0     1        0     1
  0   1     1        1     0
  1   0     1
  1   1     0
Do you see the truth table for Not embedded in the truth table for Nand?  Hint: HDL lets you connect part inputs to 0 or 1 by using "false" and "true" as signal names.

For And, think about where Nand came from. It is Not And -- which is an And followed by a Not. What operation undoes the Not? Nand followed by that operation will create an And.

--Mark