Transistor based CPU - feasibility, and gate reduction

classic Classic list List threaded Threaded
1 message Options
Reply | Threaded
Open this post in threaded view
Report Content as Inappropriate

Transistor based CPU - feasibility, and gate reduction

Hi All,

I have been thinking about the feasibility of implementing a cpu using transistor logic and some estimate to the cost using off the shelf components.

After all, this was how computers were made, up until the late 1960's when ICs became economically viable (previously too expensive for all but military/space applications).

Reducing the Hack, to logic based around 2 input Nand gates, will give a gate count of about 1280 gates.  The architecture is formed from a series of 16 identical slices - called "bit slices".  Each of the 16 slices holds one bits' worth of ALU, Areg, Dreg and program counter - 80 gates per slice.

Now if you use Diode-Transistor logic (DTL), a 2 input Nand becomes  3 diodes, 2 resistors and a transistor.

2 resistors       $0.01
3 diodes          $0.03
1 transistor      $0.03

So your basic gate costs about 7 to 10 cents, which increases to about 15 cents when mounted on a small area of printed circuit board.

By way of comparison,  if the same logic were implemented in TTL ICs - such as 74HC00, you would get 4 gates for 10 cents, on the same 5 cent board, not only saving considerably on the cost per gate, but much smaller overall pcb size used in the design.

But returning to the DTL design, I have searched the web for examples and inspiration, and come up with a link to a 16 bit transistor computer design, called MT15, implemented by a German engineer Dieter Mueller.

He used a mix of NPN and PNP transistors using DTL and a little known logic technique called Complimentary Transistor Logic - or CTL.

More interestingly, is a novel approach to his ALU design.  By using a mix of 2 input and 3 input Nand gates,  he reduces the ALU slice from about 35 gates to about 15.  A 3 input Nand gate is just a 2 input Nand with an extra input diode - costing just $0.01 more.

He introduces his ALU technique - starting here on a 2 page article on half adders.

His ALU slice is shown here:

It is just 13 Nands of which 6 are 3 input Nands.  His ALU would also need a couple of extra gates to detect the zero condition.

So from an ALU slice of 35 gates ($5.25 on a pcb) his design is 15 gates plus 6 extra diodes ($2.31 on a pcb).  Multiply these savings across all 16 slices - and you have saved 320 gates, and nearly $50 in components - not to mention all that soldering.  

Note that the pcb area used is also a significant cost of the design - often a similar cost to the actual components used.

Pictures of Dieter's MT15 transistor computer are here