# Trobles implementing some of the chips in HDL

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## Trobles implementing some of the chips in HDL

 Hi, I follow this course as a "private student" - I don't go to any school. I have trouble implementing some of the more advanced chips in chapter 1 in HDL, namely the last 4 (Mux4way16, Mux8way16, DMux4way and DMux8way). I wikied the multiplexor, and found the Boolean equation for the 4-way Mux. I could always implement that, but I wonder how this is done from the scratch? Anyways, I don't find equations for the last 3, so... could anybody help me a little? Is it possible to look at the truth table, and deduce the Boolean equation (and then how it's implemented in HDL)? Thanks.
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## Re: Trobles implementing some of the chips in HDL

 The analogy that works for me when looking at MUXs is a knock-out sports competition. There may be 8 entrants but there will only be one winner. The competition is bent though, because all the refs have been instructed beforehand. Have you ever seen the diagrams which show all the teams paired off on the left side (the first round) then the winners of each match form pairs for the second round etc right down to the winner. In the case of Muxs all the matches in round 1 are decided by ref[0], all the matches in round[2] are decided by ref[1] etc. Each ref makes sure all the games under his control finishes with the same result. Because the number of teams is halved after each round ref[0] has to officiate at twice as many games as ref[1] who has twice as many as ref[2] etc. You can think of an 4 team knock out as being like two 2 team knock out competitions with a playoff between the 2 winners You can think of an 8 team knock out as being like two 4 team knock out competitions with a playoff between the 2 winners Each n/2 way Mux must be supplied with the correct teams and the number of refs required, ie half the teams each. One ref is kept back to decide the final playoff. all the rest of the refs have to go to both of the sub competitions. Whatever else I hope this analogy doesn't make things harder!
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## Re: Trobles implementing some of the chips in HDL

 Thank you for the reply. But I don't get it, though... I guess I have to use several Mux16 which I have already implemented, but I'm stuck... =/
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## Re: Trobles implementing some of the chips in HDL

 In reply to this post by MacMagnus I implemented the Mux4Way first so I think you are on the right track. What helped me was to think about canonical representations and what must be true for each of the inputs to be selected. Once you have the Mux4Way and Mux8Way the 16-bit versions are easy. Feel free to private e-mail me if you need more help so that we don't end up giving away any solutions here.
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## Re: Trobles implementing some of the chips in HDL

 In reply to this post by MacMagnus If you have 4 inputs (a, b, c, d) their addresses will be represented in binary by 00, 01, 10, 11. In your sel array the sel[0] corresponds to the lsb bit. Therefore you can use a mux with sel[0] as the sel bit to decide between a and b and another mux with sel[0] also as the sel bit to decide between c and d. Call the outputs of these 2 muxs e and f. The address for e will be either 00 or 01 while the address for f will be either 10 or 11 Now to get the final output you have to pick one of e or f If people feel this is inappropriate I'll edit it. I figured since there's no hdl it's allowed EDIT looking at what i wrote above, I don't know if I should have used the word 'address'. The point I was trying to make was that if you think of the Mux as having 4 input slots these from the MUX's point of view would be be 00, 01, 10 11
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## Re: Trobles implementing some of the chips in HDL

 Thank you very much! This hint helped me solve the the current problem, as well as the rest of the problems in chapter 1. =)