At least as far as this HDL implementation goes, how simple and effective can the PC.hdl chip be? I've compared other solutions and they seem to much more than the 6 lines mine has.
I'm especially concerned about the Mux8Way (or maybe it was a DMux8Way, can't remember) because it feels a little bit excessive. They're HDL behemoths to me. I used to dread thinking about using them but then I got to chapter 4.
If you email me your PC.hdl (proves that you wrote one) I'll send you several different implementations to look at. Some simple, the shortest using 3 parts, and some strange ones using an ALU to compute the Register input value that I wrote as an intellectual exercise.
If you have or want to download Logisim (free) I can you those in a circuit file, too.