I am on Chapter 1 1.3 Implementation. I am making the various gates using Nand gates only as the book says. I am only writing them down on paper for now since I am not yet done with chapter 1 and Appendix A. My issue is:
a. I have figured out these gates -> Nand (I implemented this just to see how it would look), Not (aka inverter), And, Or, Xor
But I can not figure out the next gate, the multiplexor. I have been working on that for the last two hours today and three hours yesterday. I don't mind putting in this work but my question is should I just continue going on until I (hopefully) figure it out or should I just ask for help already since I've put in some hours already? (I guess I'm wondering if this should be taking me this long...)
Edit 8/10/12 2037: I am so glad you did not give me the answer below, cadet! I figured out the multiplexor at work today! Only took me almost seven hours but oh well at least I figured it out on my own. Yay! Now, moving along with the demultiplexor.
First, to be successful with TECS you must do. The book is set up so that you explore your way to solutions by doing the projects.
Install the book's tools and the project files. Implement and test the gates in the order they are presented in 1.2, starting with the Not gate.
You sound a lot like my gifted students; they want to read and understand everything before attempting any of the homework--in this case the projects--so that they can get it all correct the first time.
This does not work well for TECS. It is much better to jump right in and try to write Not.hdl. You will likely have syntax errors that will prevent it from loading into the hardware simulator. Look at the Xor example HDL and the example HDL at the start of appendix A. This shouldn't be too hard since your Not.hdl will only have one Nand part in its implementation.
Run the Not.tst file in the hardware simulator. If it fails, compare the compare file and the output file and figure out why your output doesn't match.
Then write and test the And chip, etc.
When you get to the Mux, if you still don't have any ideas about how to implement it, go back to the section on canonical representation. That's the key to the Mux.
So, I figured out the Mux like I edited in my original post. After that, I sat in my bed to get started on the demux and I had it done after like ten minutes. Haha!
Now, I am working on the multi-bit and multi-way gates. My questions here are:
What am I supposed to do? I don't specifically understand what the book is asking me to create when it says "multi-bit not" on the section 1.3. On section 1.3, it does not indicate what kind of multi-bit Not gate I am to create. (ie Not4 or Not5 etc.) I think I may even be wording it incorrectly. Should I be saying multi-bit Not array or gate array...? I'm confused all around.
Also, what does 'i' mean in the function line of the API box?
^ I was thinking it may mean this since it says i equals 0...15 .
Or maybe it means 'in'?
^ I was thinking it may mean this if it was a shortened form of in mentioned in the "Inputs" area of the API box.
Or it might mean 'data'
^ I was thinking it may mean this because of this sentence:
"to refer to individual bits in a 16-bit bus named data, we use the notation data , data ,..., data" .
The purpose of the multi-bit gates is to apply the operation in parallel to buses. Buses are collections of wires with a shared purpose. For instance a bus may carry a memory address or a data word.
1.2.3 shows you that the mutli-bit gates for TECS need to be 16 bits wide. See the gray box under Multi-Bit Not, for instance.
"For i=0..15 out[i]=Not(in[i])" is pseudocode. Pseudocode is a program-like description of how something should work. It is not a specific programming language, just a sketch to express ideas. It will make sense once you start to learn how to program. In the case of the for statement, the i is the index variable and this statement says "for i taking on each of the values 0, 1, 2, 3, ... 15; evaluate the statement that follows, replacing i with the value."
Or in plain English, it says that for each wire of the in bus, you need to connect it to the corresponding wire of the out bus, using a not gate.
Note that programmers and engineers start counting with 0. The wires in a 16-bit bus are numbered from 0 to 15.
I don't get everything you wrote above but that's ok. I don't understand most of the book yet. I think I'll have to read the whole thing and then review with Q&A. But for now, I need to figure out what I am doing with the next gates that I have to implement.
1. So, with the multi-bit Not gate, how many bits are the gate that I need to implement?
2. Do I just need to connect the Not gate together so that they all have the same single in switch? Then I write down the code for it. correct?
3. If the above is correct then that means I do the same thing for the multi-bit And, Or, and Multiplexor gates, correct?
Edit: "the implementation of their n-ary versions is simply a matter of constructing arrays of n elementary gates, having each gate operate separately on its bit inputs"
^ I think this statement might solve questions number 2 and 3 that I posted above... (but i'm not sure though)
Did you find the Study Plan page on the web? For each chapter there is a set of lecture slides (hit Powerpoint or Acrobat icon in "Lecture" column) and a project overview ("Do" column). In the project overview you can get the skeleton and test files that you need for the project. You don't need to download the files one-by-one; there is a .zip file that contains them all. The link to it is usually at the bottom of the page.
There are skeleton .HDL files for every part you need to build. Be sure to build the parts in the order described in the book.
From my previous post:
"1.2.3 shows you that the mutli-bit gates for TECS need to be 16 bits wide."
"for each wire of the in bus, you need to connect it to the corresponding wire
of the out bus, using a not gate."
So your Not16.hdl will have 16 parts lines:
I kind of see what you are referring to now, cadet. We are on two different things but that's ok. What I am saying is that I am still on section 1.3. I have not reached the study plan yet. I am doing things a bit differently to help me out a bit.
But anyway, I think I figured it out. I just made a 2-bit multi-bit Not, Or and And gate (instead of 16 since 16 was just an example anyway). As long as I know how to connect them without them interfering with each other than as far as i know I understand it. I will do the 2-bit multi-bit Mux, multi-way Or, 4-way 16-bit multiplexor, 8-way 16-bit multiplexor, 4-way 1-bit demultiplexor, and finally the 8-way 1-bit multiplexor tomorrow after i get some sleep. (i'll probably edit this post at that time)
Edit: Ah ok. Thank you, cadet! Guess the 16-bits are a requirement then. Not difficult since it's the same as the 2-bit gates I created just much more writing and documenting. I will start it right away.
** This may be a spoiler for those who haven't started working on TECS yet. If so then please delete this cadet and I can PM you this question instead. I don't want to ruin the experience for anyone. **
I have been working on the multiple 16-bit gates for the last six hours. (time consuming this is!) My 16-bit Not gate I made consisted of 61 Nand gates that I drew by hand and then wrote out the corresponding code. (that means I hand compiled it, right?) The 16-bit And gate consisted of 87 Nand gates which I also hand compiled. I just want to make sure that what I am doing is correct so far, that's all. It is, right? I still have the other seven multi-bit gates to hand compile and judging by what I have done so far they will be composed of maybe 100-200 Nand gates. This is very time-consuming but if this is what needs to be done for me to learn then so be it. :)
I sent you what I have, cadet. If that is incorrect then I just do not understand this book at all. I went ahead and had a peak at what you sent me and it just doesn't make sense to me. Not based off of what the book said. I have a lot of questions about the intro and chapter 1 that I didn't ask and maybe I should have but I still do not understand what you sent me at all.
Programming isn't the only prerequisite for this book, it assumes much more than that. I feel extremely frustrated with this book after spending 6+ hours working on this (pretty much my entire day) and possibly everything I did, all of it, is incorrect.
Edit: I stared at and went over what you sent me and it kinda makes sense now. I just wish this book was written much more clearly. It is so confusing. It is extremely very frustrating to waste so much time and motivation.
I am really adamant on understanding this book for a number of reasons. Perhaps a big one is because I have only a couple of days left before I have to decide whether I will keep this text or return it for a refund. I am still undecided but I have found more information about what I felt is lacking in this book but was not able to verbalize it since I am nothing but a beginner in all of this:
I had to search a bit to find what I was feeling with my experience of this book so far. The above link I am assuming spells out some examples of other things that are required to understand this book. As listed above, not just programming but also flip-flops and how a VHDL-like language works and other stuff as well. Perhaps, we can list other books or sites that fill in these gaps...? Then maybe the book might make more sense...
I strongly disagree. I just read chapter one to be sure and found that multibit versions are explained very well. There is a very distinct separation of the concept of "n-bit bus" (i.e. Or16) vs. "merging the output" (i.e. Or8Way)
There is no need for previous knowledge of any HDL language, nor even for the knowledge of existence of such thing. Explanation in the main text is satisfactory and very nice. I admit that the documentation in the appendix should be formulated more clearly, I personally had some problems figuring how to connect one bus to multiple different chips (CPU construction, instruction decoding).
You can view flip-flop exactly as you would view nand, just a black box with defined functionality. If the authors were to discuss their physical realization, where would they stop? Because at some point someone might step in and say: "Hey, this Ohm law you are mentioning, where does that come from? You ought to cover this topic as well!" But then again, Ohm law may be inferred from Maxwell equations, but where do they come from? Should we incorporate special relativity as well? Tensor algebra? This clearly is nonsense.
@bottomup2: "I am making the various gates using Nand gates only as the book says."
The book doesn't state this, and from your latest post it sounds like you're missing a key point: abstraction.
Yes, you start with NAND. Using NAND, you should built Not. Now what do you have? You have two chips: Nand and Not. You should then have built And using Nand and Not. Now what do you have? Three chips: Nand, Not and And. Next, you should have built Or, Xor, etc, using all the chips you have built at your disposal.
When you state that your "16-bit Not gate I made consisted of 61 Nand gates," then I believe you're on the wrong path. Didn't you build a 1-bit Not gate? How might you use those to build a 16-bit Not gate?
It also sounds like you would benefit from some specific, step-by-step help. Did you: