# zr & ng implementation

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## zr & ng implementation

 Here was my attempted approach: ```Add16(a=outno, b=true, out=addzr); // if (out == 0) sets zr = 1 And(a=addzr[15], b=true, out=zr); And(a=outno[15], b=true, out=ng); // if (out < 0) sets ng = 1```In the former case, my logic was if out is zero, the 16th bit of the sum of out and true has to be one. However, this does not work due to the following reason: "sub bus of internal node may not be used." I'm guessing the other way of doing it would be comparing the inputs of zx, nx, zy, etc... but this seems quite complicated — especially in the case of out < 0. Any suggestions?
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## Re: zr & ng implementation

 As a hint, remember that if a number is equal to zero, then all the bits in the number must be zero. One of the gates designed in chapter one can be used to determine whether there are any 1-bits in the gate's input. You can take these and do a bit of manipulation with them to generate zr fairly painlessly.